(1) Field of the Invention
The present invention relates to semiconductor devices.
(2) Description of the Related Art
In order to reduce the size, thickness, and weight of electronic apparatuses and achieve packaging thereof in a high density, many semiconductor devices manufactured using techniques of wafer-level chip size packaging (CSP) which enables fabrication processing at wafer level, have been used in recent electronic apparatus.
An example of the application of such semiconductor device includes solid-state imaging devices which are typical of optical devices. The solid-state imaging devices are used as photosensors in digital imaging apparatuses, such as digital still cameras, cameras built in mobile phones, and digital camcorders. In order to achieve such reduction of the size, thickness, and weight of imaging apparatuses and packaging thereof in a high density, techniques of the wafer-level CSP have been used for manufacturing the solid-state imaging devices instead of techniques of ceramic-type or plastic-type packaging. The ceramic-type packaging and the plastic-type packaging ensure electrical connection between inside and outside the apparatuses by die bonding and wire bonding. On the other hand, in the techniques for the wafer-level CSP, the electrical connection between inside and outside the apparatuses are ensured by forming through electrodes and rewiring in fabrication processing on wafers before dicing (for example, see patent reference 1: Japanese Unexamined Patent Application Publication Number 2004-207461 and patent reference 2: Japanese Unexamined Patent Application Publication Number 2007-123909).
FIG. 5 is a cross-sectional view showing a configuration of a solid-state imaging device which has a conventional wafer-level CSP structure.
As shown in FIG. 5, a conventional solid-state imaging device 100A includes a solid-state imaging element 100 including an imaging area 102, a peripheral circuit area 104a, and a plurality of electrode portions 104b. The imaging area 102 is located on a semiconductor substrate 101 and has a plurality of microlenses 103 on a main surface, which is a light-receiving surface, of the semiconductor substrate 101, and generates a light-reception signal according to received light. The peripheral circuit area 104a is formed in a surrounding area of the imaging area 102 on the main surface, and processes light-reception signals generated in the imaging area 102. The electrode portions 104b are electrically connected to the peripheral circuit area 104a and take out light-reception signals processed by a peripheral circuit area 104a. 
In addition, a transparent substrate 106 made of, for example, optical glass, is formed above the main surface of the semiconductor substrate 101 with a bonding member 105 made of resin interposed therebetween. In addition, in the semiconductor substrate 101, through electrodes 107 are formed which penetrate through the semiconductor substrate 101 in the thickness direction of the semiconductor substrate 101.
On a back surface, which is opposite to the main surface of the semiconductor substrate 101, metal wiring 108 is formed. The metal wiring 108 is electrically connected to the electrode portions 104b of the peripheral circuit area 104a via the through electrodes 107. Further, on the back surface of the semiconductor substrate 101, an insulating resin layer 109 which covers part of the metal wiring 108 is formed. The rest of the metal wiring 108 is exposed in through-holes in the insulating resin layer 109. In each of the through-holes, an external electrode 111 made of, for example, a solder material is formed.
Note that the solid-state imaging element 100 is electrically insulated from the through electrodes 107 and the metal wiring 108 by an insulating layer not shown in FIG. 5.
As described above, in the conventional solid-state imaging device 100A, the electrode portions 104b are electrically connected to the metal wiring 108 via the through electrodes 107, and further to the external electrodes 111 via the metal wiring 108, thus allowing light-reception signals to be taken out from the external electrode 111.
The conventional solid-state imaging device 100A is manufactured through a process exemplified below.
(Step 1) A plurality of solid-state imaging elements 100 having the above-described structure are formed on a wafer using a known method. The transparent base material that has the same shape as the wafer is attached to the wafer having the solid-state imaging elements 100 formed thereon, via aggregate of the bonding member 105 made of a resin layer. Note that transparent base material is aggregate of the transparent substrate 106 which is made of, for example, optical glass.
(Step 2) Through-holes are formed in the wafer by dry etching or wet etching from the back surface of the wafer. The through-holes penetrate through the semiconductor substrate 101 and reach the electrode portions 104b. Then, the through-holes are filled with a conductive material to form the through electrodes 107 connecting to the electrode portions 104b which allows light-reception signals to be taken out.
(Step 3) The metal wiring 108 is formed on the back surface of the solid-state imaging elements 100 by electroplating in a manner such that the metal wiring 108 electrically connects to the through electrodes 107.
(Step 4) The insulating resin layer 109 is formed on the back surface of the solid-state imaging elements 100 so as to cover the metal wiring 108. Typically, the insulating resin layer 109 is made of photosensitive resin and aggregate of the insulating resin layer 109 is formed by spin-coating or applying a dry film.
(Step 5) The insulating resin layer 109 is selectively removed by a photolithographic technique (exposure and developing) to form the openings in which part of the metal wiring 108 is exposed.
(Step 6) The external electrodes 111 are formed in the respective openings by a solder ball mounting method using flux or a solder paste printing method in a manner such that the external electrodes 111 electrically connects to the metal wiring 108. The external electrodes 111 are made of, for example, a solder material.
(Step 7) Finally, using a cutting tool such as a dicing saw, the wafer on which a plurality of solid-state imaging elements 100 are formed, the aggregate of bonding member 105, the transparent base material, and the aggregate of insulating resin layer 109 are cut together into a plurality of solid-state imaging devices, each of which is the solid-state imaging device 100A shown in FIG. 5.